APS-X84 VHDL/FPGA SYNTHESIS TUTORIAL
VHDL DATA OBJECTS
There are many data objects which can be used in VHDL. To keep to the concept of this Lab book we will restrict ourselves to the following objects for our discussions:
1) std_logic
2) std_logic_vector
3) Integers
std_logic basically describes a bit. A bit can usually be described using two states (1 or 0). However there could be some other conditions such as high impedance, or don't cares which could be used in simulation or even in synthesis. In fact the std_logic package is a 9 value bit.
std_logic's defined states
'U' - Uninitialized
'X' - Forced Unknown
'0' - Logic zero
'1' - Logic one
'Z' - High Impedance
'W' - Weak unknown
'L' - Weak Zero
'H' - Weak One
'-' - Don't care
Keeping our minds on Synthesis only here we will basically use only 1 or 0 and perhaps Z(high impedance). From our ANDGATE program you can see that in our ENTITY declarations we declared Ain, Bin and COut all as std_logic.
ENTITY ANDGATE IS
PORT ( Ain: in STD_LOGIC; Bin: in STD_LOGIC ; COut: out STD_LOGIC ); END ANDGATE; |
BusIn : in STD_LOGIC_VECTOR(7 downto 0); -- eight bit bus
OR BusIn: in STD_LOGIC_VECTOR(0 to 7); -- eight bit bus |
Once an array is declared, individual members can be accessed as shown:
BusIn(3 downto 0) <= "1010";
BusIn(4) <= '1'; BusIn(7) <= Ain; |
--
-- Covert standard logic vector to integer -- FUNCTION slvect2int(vect : std_logic_vector) RETURN INTEGER IS VARIABLE size : INTEGER RANGE vect'length-1 DOWNTO
0;
IF (vect(i) = '1') THEN
END LOOP;
|
INTEGERS are used to describe numbers which are easy to increment and do simple math on. They typically describe an N bit std_logic_vector where N is the largest numbers of bits which can describe the integers maximum range. Integers are very useful for counter operations. An integer is declared in the program below:
library IEEE;
use IEEE.std_logic_1164.all; library METAMOR;
library SYNOPSYS;
library PN_PAK;
ENTITY X84DEMO IS PORT
attribute pinnum of DivCntIn : signal is "P10,P9,P8,P7,P6,P5,P4,P3";
SIGNAL Count: INTEGER RANGE 0 TO 255;
-- Divide input by Multiplier times the DivCntIn value
BEGIN DIVIDER: PROCESS
IF Count >= slvect2int(DivCntIn,8) THEN
END behave; |
We also see an INTEGER which is not a SIGNAL but is in fact a CONSTANT. This is exactly what it sounds like. The format for the CONSTANT is the same as the SIGNAL format except the := sign is used to assign the CONSTANT value. This value will be STATIC and can be assigned or manipulated throughout the code. In our example we use the value to set a CONSTANT Multiplier which sets is used for comparison in an IF THEN condition statement.
While we are here you will also notice some other new code elements. A new library called PN_PAK is USED and a FUNCTION slvect2int() (which is contained in PN_PAK is used. These will be discussed in greater detail in the INCLUDE STUFF discussion.